The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Substrate processing systems such as semiconductor processing systems may be used to deposit or etch film layers, metal layers or other types of layers on a substrate such as a semiconductor wafer. The substrate processing system may include one or more processing stations. In a substrate processing system, substrate handling can have a significant impact on cost and throughput. To increase throughput and reduce cost, the substrates need to be processed through different processing steps in the most efficient manner and with minimal or no contamination.
In some substrate processing systems, the substrates are moved from a substrate cassette to a reactor and then back to a substrate cassette or another location. To improve throughput and reduce substrate handling, a single reactor may include multiple, sequential processing stations. In this type of substrate processing system, the substrate is moved to the reactor, processed sequentially in the processing stations and then moved to a substrate cassette or another location. This processing arrangement tends to increase throughput by reducing substrate handling.
While substrate processing tools have been developed to provide high throughput and low material cost, these substrate processing tools do not typically allow pre- or post-processing options on the same tool. Some tools combine multiple station, sequential processing (MSSP) with single station modules such as pre-clean or pre-treatment modules. However, the material cost for these tools tends to be higher because many subsystems of the tool are replicated for each module. Moreover, since the modules sprawl around a centralized wafer handler, the overall footprint is relatively large.